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C8051F310 Datasheet(PDF) 161 Page - Silicon Laboratories

Part # C8051F310
Description  8/16 kB ISP Flash MCU Family
PDF  228 Pages
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Manufacturer  SILABS [Silicon Laboratories]
Direct Link  http://www.silabs.com
Logo SILABS - Silicon Laboratories

C8051F310 Datasheet(HTML) 161 Page - Silicon Laboratories

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Rev. 1.7
161
C8051F310/1/2/3/4/5/6/7
14.6. SMBus Status Decoding
The current SMBus status can be easily decoded using the SMB0CN register. In the table below, STATUS
VECTOR refers to the four upper bits of SMB0CN: MASTER, TXMODE, STA, and STO. Note that the
shown response options are only the typical responses; application-specific procedures are allowed as
long as they conform to the SMBus specification. Highlighted responses are allowed but do not conform to
the SMBus specification.
Table 14.4. SMBus Status Decoding
Values Read
Current SMbus State
Typical Response Options
Values
Written
1110
0
0
X
A master START was
generated.
Load slave address + R/W into
SMB0DAT.
0
0
X
1100
000
A master data or address byte
was transmitted; NACK
received.
Set STA to restart transfer.
1
0
X
Abort transfer.
0
1
X
001
A master data or address byte
was transmitted; ACK
received.
Load next data byte into
SMB0DAT.
0
0
X
End transfer with STOP.
0
1
X
End transfer with STOP and start
another transfer.
1
1
X
Send repeated START.
1
0
X
Switch to Master Receiver Mode
(clear SI without writing new data
to SMB0DAT).
0
0
X
1000
1
0
X
A master data byte was
received; ACK requested.
Acknowledge received byte; Read
SMB0DAT.
0
0
1
Send NACK to indicate last byte,
and send STOP.
0
1
0
Send NACK to indicate last byte,
and send STOP followed by
START.
1
1
0
Send ACK followed by repeated
START.
1
0
1
Send NACK to indicate last byte,
and send repeated START.
1
0
0
Send ACK and switch to Master
Transmitter Mode (write to
SMB0DAT before clearing SI).
0
0
1
Send NACK and switch to Master
Transmitter Mode (write to
SMB0DAT before clearing SI).
0
0
0



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