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TMS320DM642 Datasheet(PDF) 62 Page - Texas Instruments

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Part # TMS320DM642
Description  Video/Imaging Fixed-Point Digital Signal Processor
PDF  176 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
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TMS320DM642 Datasheet(HTML) 62 Page - Texas Instruments

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TMS320DM642
Video/Imaging Fixed-Point Digital Signal Processor
SPRS200L – JULY 2002 – REVISED JANUARY 2007
Table 3-7. Device Status (DEVSTAT) Register Selection Bit Descriptions
BIT
NAME
DESCRIPTION
31:12
Reserved
Reserved. Read-only, writes have no effect.
EMAC enable bit.
Shows the status of whether EMAC peripheral is enabled or disabled (default).
11
MAC_EN
0 = EMAC is disabled, and the module is powered down (default).
1 = EMAC is enabled.
This bit has no effect if the PCI peripheral is enabled (PCI_EN = 1).
HPI bus width control bit.
Shows the status of whether the HPI bus operates in 32-bit mode or in 16-bit mode (default).
10
HPI_WIDTH
0 = HPI operates in 16-bit mode. (default).
1 = HPI operates in 32-bit mode.
PCI EEPROM auto-initialization bit (PCI auto-initialization via external EEPROM).
Shows the status of whether the PCI module initializes internal registers via external EEPROM or if the
internal PCI default values are used instead (default).
9
PCI_EEAI
0 = PCI auto-initialization through EEPROM is disabled; the PCI peripheral uses the specified PCI default
values (default).
1 = PCI auto-initialization through EEPROM is enabled; the PCI peripheral is configured through
EEPROM provided the PCI peripheral pin is enabled (PCI_EN = 1).
PCI enable bit.
Shows the status of whether the PCI peripheral is enabled or disabled (default).
8
PCI_EN
0 = PCI disabled. (default).
1 = PCI enabled.
Global select for the PCI vs. HPI/EMAC/MDIO/GPIO peripherals.
7
Reserved
Reserved. Read-only, writes have no effect.
6
CLKMODE1
Clock mode select bits
Shows the status of whether the CPU clock frequency equals the input clock frequency X1 (Bypass), x6,
or x12.
Clock mode select for CPU clock frequency (CLKMODE[1:0])
00 - Bypass (x1) (default mode)
01 - x6
5
CLKMODE0
10 - x12
11 - Reserved
For more details on the CLKMODE pins and the PLL multiply factors, see the Clock PLL section of this
data sheet.
Device Endian mode (LEND)
Shows the status of whether the system is operating in Big Endian mode or Little Endian mode (default).
4
LENDIAN
0 - System is operating in Big Endian mode
1 - System is operating in Little Endian mode (default)
3
BOOTMODE1
Bootmode configuration bits
Shows the status of what device bootmode configuration is operational.
Bootmode [1:0]
00 - No boot (default mode)
2
BOOTMODE0
01 - HPI/PCI boot (based on PCI_EN pin)
10 - Reserved
11 - EMIFA boot
1
AECLKINSEL1
EMIFA input clock select
Shows the status of what clock mode is enabled or disabled for the EMIF.
Clock mode select for EMIFA (AECLKIN_SEL[1:0])
00 - AECLKIN (default mode)
0
AECLKINSEL0
01 - CPU/4 Clock Rate
10 - CPU/6 Clock Rate
11 - Reserved
Device Configurations
62
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