AT89C51IC2-SLSCM datasheet(103/146 Pages) ATMEL

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103

AT89C51IC2

4301A–8051–01/04

Table 80. WDTPRG Register

WDTPRG - Watchdog Timer Out Register (0A7h)

Reset value XXXX X000

WDT During Power Down

and Idle

In Power Down mode the oscillator stops, which means the WDT also stops. While in

Power Down mode the user does not need to service the WDT. There are 2 methods of

exiting Power Down mode: by a hardware reset or via a level activated external inter-

rupt which is enabled prior to entering Power Down mode. When Power Down is exited

with hardware reset, servicing the WDT should occur as it normally should whenever the

AT89C51IC2 is reset. Exiting Power Down with an interrupt is significantly different. The

interrupt is held low long enough for the oscillator to stabilize. When the interrupt is

brought high, the interrupt is serviced. To prevent the WDT from resetting the device

while the interrupt pin is held low, the WDT is not started until the interrupt is pulled high.

It is suggested that the WDT be reset during the interrupt service routine.

To ensure that the WDT does not overflow within a few states of exiting of powerdown, it

is better to reset the WDT just before entering powerdown.

In the Idle mode, the oscillator continues to run. To prevent the WDT from resetting the

AT89C51IC2 while in Idle mode, the user should always set up a timer that will periodi-

cally exit Idle, service the WDT, and re-enter Idle mode.

7654

3210

-----

Bit

Number

Bit

Mnemonic Description

Reserved

The value read from this bit is undetermined. Do not try to set this bit.

2S2

WDT Time-out select bit 2

1S1

WDT Time-out select bit 1

0S0

WDT Time-out select bit 0

S1 S0Selected Time-out

000

14 - 1) machine cycles, 16. 3 ms @ F

OSCA =12 MHz

001

(215 - 1) machine cycles, 32.7 ms @ F

OSCA=12 MHz

10 (2

16 - 1) machine cycles, 65. 5 ms @ F

OSCA=12 MHz

011

17 - 1) machine cycles, 131 ms @ F

OSCA=12 MHz

100

(218 - 1) machine cycles, 262 ms @ F

OSCA=12 MHz

01 (2

19 - 1) machine cycles, 542 ms @ F

OSCA=12 MHz

110

20 - 1) machine cycles, 1.05 s @ F

OSCA=12 MHz

111

(221 - 1) machine cycles, 2.09 s @ F

OSCA=12 MHz

AT89C51IC2-SLSCM Datasheet(PDF) 103 Page - ATMEL Corporation

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