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AT89C51IC2-SLSCM Datasheet(PDF) 129 Page - ATMEL Corporation |
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AT89C51IC2-SLSCM Datasheet(HTML) 129 Page - ATMEL Corporation |
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129 / 146 page ![]() 129 AT89C51IC2 4301A–8051–01/04 Notes: 1. Operating I CC is measured with all output pins disconnected; XTAL1 driven with TCLCH, TCHCL = 5 ns (see Figure 55.), VIL = VSS + 0.5V, V IH = VCC - 0.5V; XTAL2 N.C.; EA = RST = Port 0 = VCC. ICC would be slightly higher if a crystal oscillator used (see Figure 52). 2. Idle ICC is measured with all output pins disconnected; XTAL1 driven with TCLCH, TCHCL = 5 ns, VIL = VSS + 0.5V, VIH = VCC - 0.5V; XTAL2 N.C; Port 0 = V CC; EA = RST = VSS (see Figure 53). 3. Power Down I CC is measured with all output pins disconnected; EA = VSS, PORT 0 = VCC; XTAL2 NC.; RST = VSS (see Fig- ure 54). 4. Capacitance loading on Ports 0 and 2 may cause spurious noise pulses to be superimposed on the V OLs of ALE and Ports 1 and 3. The noise is due to external bus capacitance discharging into the Port 0 and Port 2 pins when these pins make 1 to 0 transitions during bus operation. In the worst cases (capacitive loading 100pF), the noise pulse on the ALE line may exceed 0.45V with maxi V OL peak 0.6V. A Schmitt Trigger use is not necessary. 5. Typical are based on a limited number of samples and are not guaranteed. The values listed are at room temperature and 5V. 6. Under steady state (non-transient) conditions, I OL must be externally limited as follows: Maximum I OL per port pin: 10 mA Maximum IOL per 8-bit port: Port 0: 26 mA Ports 1, 2 and 3: 15 mA Maximum total IOL for all output pins: 71 mA If I OL exceeds the test condition, VOL may exceed the related specification. Pins are not guaranteed to sink current greater than the listed test conditions. 7. For other values, please contact your sales office. 8. Icc Flash Write operation current while an on-chip flash page write is on going. 9. Flash Retention is guaranteed with the same formula for V CC Min down to 0. V OH1 Output High Voltage, port 0, ALE, PSEN V CC - 0.3 V CC - 0.7 V CC - 1.5 V V V V CC = 5V ± 10% I OH = -200 µA I OH = -3.2 mA I OH = -7.0 mA 0.9 V CC V VCC = 2.7V to 5.5V I OH = -10 µA R RST RST Pulldown Resistor 50 200(5) 250 k Ω I IL Logical 0 Input Current ports 1, 2, 3, 4 and 5 -50 µAV IN = 0.45V I LI Input Leakage Current for P0 only ±10 µA 0.45V < V IN < VCC I TL Logical 1 to 0 Transition Current, ports 1, 2, 3, 4 -650 µAV IN = 2.0V C IO Capacitance of I/O Buffer 10 pF Fc = 3 MHz TA = 25 °C IPD Power Down Current 100 150 µA4.5V < V CC < 5.5V (3) ICCOP Power Supply Current on normal mode 0.4 x Frequency (MHz) + 5 mA VCC = 5.5V (1) ICCIDLE Power Supply Current on idle mode 0.3 x Frequency (MHz) + 5 mA VCC = 5.5V (1) I CCProg Power Supply Current during flash Write / Erase 0.4 x Frequency (MHz) + 20 mA V CC = 5.5V (8) T A = -40°C to +85°C; VSS = 0V; V CC =2.7V to 5.5V and F = 0 to 40 MHz (both internal and external code execution) V CC =4.5V to 5.5V and F = 0 to 60 MHz (internal code execution only) (Continued) Symbol Parameter Min Typ Max Unit Test Conditions |
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