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AT89C51IC2-SLSCM Datasheet(PDF) 130 Page - ATMEL Corporation |
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AT89C51IC2-SLSCM Datasheet(HTML) 130 Page - ATMEL Corporation |
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130 / 146 page ![]() 130 AT89C51IC2 4301A–8051–01/04 DC Parameters for Low Voltage TA = 0 °C to +70°C; V SS = 0V; VCC = 2.7V to 3.6V; F = 0to 48 MHz TA = -40 °C to +85°C; V SS = 0V; VCC = 2.7V to 3.6V; F = 0 to 48 MHz Notes: 1. Operating I CC is measured with all output pins disconnected; XTAL1 driven with TCLCH, TCHCL = 5 ns (see Figure 55.), VIL = V SS + 0.5V, VIH = VCC - 0.5V; XTAL2 N.C.; EA = RST = Port 0 = VCC. ICC would be slightly higher if a crystal oscillator used (see Figure 52). 2. Idle I CC is measured with all output pins disconnected; XTAL1 driven with TCLCH, TCHCL = 5 ns, VIL = VSS + 0.5V, VIH = VCC - 0.5V; XTAL2 N.C; Port 0 = VCC; EA = RST = VSS (see Figure 53). 3. Power Down I CC is measured with all output pins disconnected; EA = VSS, PORT 0 = VCC; XTAL2 NC.; RST = VSS (see Fig- ure 54). 4. Capacitance loading on Ports 0 and 2 may cause spurious noise pulses to be superimposed on the VOLs of ALE and Ports 1 and 3. The noise is due to external bus capacitance discharging into the Port 0 and Port 2 pins when these pins make 1 to 0 transitions during bus operation. In the worst cases (capacitive loading 100pF), the noise pulse on the ALE line may exceed 0.45V with maxi VOL peak 0.6V. A Schmitt Trigger use is not necessary. 5. Typical are based on a limited number of samples and are not guaranteed. The values listed are at room temperature and 5V. 6. Under steady state (non-transient) conditions, IOL must be externally limited as follows: Maximum I OL per port pin: 10 mA Maximum I OL per 8-bit port: Port 0: 26 mA Ports 1, 2 and 3: 15 mA Maximum total I OL for all output pins: 71 mA Symbol Parameter Min Typ Max Unit Test Conditions V IL Input Low Voltage -0.5 0.2 V CC - 0.1 V V IH Input High Voltage except RST, XTAL1 0.2 V CC + 0.9 V CC + 0.5 V V IH1 Input High Voltage, RST, XTAL1 0.7 V CC V CC + 0.5 V V OL Output Low Voltage, ports 1, 2, 3, 4(6) 0.45 V I OL = 0.8 mA (4) V OL1 Output Low Voltage, port 0, ALE, PSEN (6) 0.45 V I OL = 1.6 mA (4) V OH Output High Voltage, ports 1, 2, 3, 4 0.9 V CC VI OH = -10 µA V OH1 Output High Voltage, port 0, ALE, PSEN 0.9 V CC VI OH = -40 µA I IL Logical 0 Input Current ports 1, 2, 3, 4 -50 µAV IN = 0.45 V I LI Input Leakage Current for P0 only ±10 µA 0.45V < V IN < VCC I TL Logical 1 to 0 Transition Current, ports 1, 2, 3, -650 µAV IN = 2.0V R RST RST Pulldown Resistor 50 200 (5) 250 k Ω C IO Capacitance of I/O Buffer 10 pF Fc = 3 MHz TA = 25 °C I PD Power Down Current 10 (5) 50 µA VCC = 2.7V to 3.6V (3) I CCOP Power Supply Current on normal mode 0.4 x Frequency (MHz) + 5 mA V CC = 3.6 V (1) I CCIDLE Power Supply Current on idle mode 0.3 x Frequency (MHz) + 5 mA V CC = 3.6 V (2) I CCProg Power Supply Current during flash Write / Erase 0.4 x Frequency (MHz) + 20 mA V CC = 5.5V (8) |
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