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SH7261 Datasheet(PDF) 398 Page - Renesas Technology Corp

Part # SH7261
Description  32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
PDF  1348 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7261 Datasheet(HTML) 398 Page - Renesas Technology Corp

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Section 11 Direct Memory Access Controller (DMAC)
Rev. 2.00 Sep. 07, 2007 Page 366 of 1312
REJ09B0320-0200
11.9
Units of Transfer and Positioning of Bytes for Transfer
The number of bits (transfer data size) for a single data transfer can be selected from among the
byte (8 bits), word (16 bits), and the longword (32 bits).
Figure 11.12 is an example of DMA data-byte control for a 32-bit wide bus.
This transfer data size cannot exceed either of the data bus bit widths supported by the source and
destination for DMA transfer. The data bus widths are fixed by the hardware.
State of
address bits
State of
address bits
State of
address bits
State of
address bits
H'FF00 4000
H'FF00 4001
H'FF00 8002
H'FF00 8004
H'FF00 4002
H'FF00 4003
H'0040 0203
D0 toD31
D0 to D31
D0 to D31
D0 to D31
H'0040 0204
H'FF60 0806
H'FF60 0808
H'0040 0205
H'0040 0206
Source side
Source side
8-bit transfer
Destination side
DMAC internal 32-bit data buffers
Destination side
: Byte/bytes being handled
16-bit transfer
DMAC internal 32-bit data buffers
Figure 11.12 Example of DMA Data-Byte Control for 32-bit Bus Width



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