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SH7261 Datasheet(PDF) 476 Page - Renesas Technology Corp |
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SH7261 Datasheet(HTML) 476 Page - Renesas Technology Corp |
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476 / 1348 page ![]() Section 12 Multi-Function Timer Pulse Unit 2 (MTU2) Rev. 2.00 Sep. 07, 2007 Page 444 of 1312 REJ09B0320-0200 12.3.20 Timer Output Control Register 2 (TOCR2) TOCR2 is an 8-bit readable/writable register that controls output level inversion of PWM output in complementary PWM mode and reset-synchronized PWM mode. Bit: Initial value: R/W: 7654321 0 00000000 R/W R/W R/W R/W R/W R/W R/W R/W BF[1:0] OLS3N OLS3P OLS2N OLS2P OLS1N OLS1P Bit Bit Name Initial value R/W Description 7, 6 BF[1:0] 00 R/W TOLBR Buffer Transfer Timing Select These bits select the timing for transferring data from TOLBR to TOCR2. For details, see table 12.32. 5 OLS3N 0 R/W Output Level Select 3N* This bit selects the output level on TIOC4D in reset- synchronized PWM mode/complementary PWM mode. See table 12.33. 4 OLS3P 0 R/W Output Level Select 3P* This bit selects the output level on TIOC4B in reset- synchronized PWM mode/complementary PWM mode. See table 12.34. 3 OLS2N 0 R/W Output Level Select 2N* This bit selects the output level on TIOC4C in reset- synchronized PWM mode/complementary PWM mode. See table 12.35. 2 OLS2P 0 R/W Output Level Select 2P* This bit selects the output level on TIOC4A in reset- synchronized PWM mode/complementary PWM mode. See table 12.36. 1 OLS1N 0 R/W Output Level Select 1N* This bit selects the output level on TIOC3D in reset- synchronized PWM mode/complementary PWM mode. See table 12.37. |
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