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SH7261 Datasheet(PDF) 477 Page - Renesas Technology Corp |
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SH7261 Datasheet(HTML) 477 Page - Renesas Technology Corp |
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477 / 1348 page ![]() Section 12 Multi-Function Timer Pulse Unit 2 (MTU2) Rev. 2.00 Sep. 07, 2007 Page 445 of 1312 REJ09B0320-0200 Bit Bit Name Initial value R/W Description 0 OLS1P 0 R/W Output Level Select 1P* This bit selects the output level on TIOC3B in reset- synchronized PWM mode/complementary PWM mode. See table 12.38. Note: * Setting the TOCS bit in TOCR1 to 1 makes this bit setting valid. Table 12.32 Setting of Bits BF1 and BF0 Bit 7 Bit 6 Description BF1 BF0 Complementary PWM Mode Reset-Synchronized PWM Mode 0 0 Does not transfer data from the buffer register (TOLBR) to TOCR2. Does not transfer data from the buffer register (TOLBR) to TOCR2. 0 1 Transfers data from the buffer register (TOLBR) to TOCR2 at the crest of the TCNT_4 count. Transfers data from the buffer register (TOLBR) to TOCR2 when TCNT_3/TCNT_4 is cleared 1 0 Transfers data from the buffer register (TOLBR) to TOCR2 at the trough of the TCNT_4 count. Setting prohibited 1 1 Transfers data from the buffer register (TOLBR) to TOCR2 at the crest and trough of the TCNT_4 count. Setting prohibited Table 12.33 TIOC4D Output Level Select Function Bit 5 Function Compare Match Output OLS3N Initial Output Active Level Up Count Down Count 0 High level Low level High level Low level 1 Low level High level Low level High level Note: The reverse phase waveform initial output value changes to the active level after elapse of the dead time after count start. |
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