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SH7261 Datasheet(PDF) 658 Page - Renesas Technology Corp |
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SH7261 Datasheet(HTML) 658 Page - Renesas Technology Corp |
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658 / 1348 page  Section 14 Watchdog Timer (WDT) Rev. 2.00 Sep. 07, 2007 Page 626 of 1312 REJ09B0320-0200 Figure 14.1 shows a block diagram of the WDT. WDTOVF WTCSR WTCNT WRCSR WDT Standby control Bus interface Divider Clock selector Clock Standby mode Peripheral clock Standby cancellation Reset control Clock selection Overflow Internal reset request* Interrupt control Interrupt request [Legend] WTCSR: WTCNT: WRCSR: Watchdog timer control/status register Watchdog timer counter Watchdog reset control/status register Note: * The internal reset signal can be generated by making a register setting. Figure 14.1 Block Diagram of WDT 14.2 Input/Output Pin Table 14.1 shows the pin configuration of the WDT. Table 14.1 Pin Configuration Pin Name Symbol I/O Function Watchdog timer overflow WDTOVF Output Outputs the counter overflow signal in watchdog timer mode |
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