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SH7261 Datasheet(PDF) 731 Page - Renesas Technology Corp |
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SH7261 Datasheet(HTML) 731 Page - Renesas Technology Corp |
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731 / 1348 page ![]() Section 16 Serial Communication Interface with FIFO (SCIF) Rev. 2.00 Sep. 07, 2007 Page 699 of 1312 REJ09B0320-0200 Table 16.7 Maximum Bit Rates with External Clock Input (Asynchronous Mode) P φ (MHz) External Input Clock (MHz) Maximum Bit Rate (bits/s) 5 1.2500 78125 8 2.0000 125000 9.8304 2.4576 153600 12 3.0000 187500 14.7456 3.6864 230400 16 4.0000 250000 19.6608 4.9152 307200 20 5.0000 312500 24 6.0000 375000 24.576 6.1440 384000 28.7 7.1750 448436 30 7.5000 468750 33 8.2500 515625 36 9.0000 562500 38 9.5000 593750 40 10.0000 625000 Table 16.8 Maximum Bit Rates with External Clock Input (Clocked Synchronous Mode, t Scyc = 12 tpcyc) P φ (MHz) External Input Clock (MHz) Maximum Bit Rate (bits/s) 5 0.4166 416666.6 8 0.6666 666666.6 16 1.3333 1333333.3 24 2.0000 2000000.0 28.7 2.3916 2391666.6 30 2.5000 2500000.0 33 2.7500 2750000.0 36 3.0000 3000000.0 38 3.1666 3166666.6 40 3.3333 3333333.3 |
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