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SH7261 Datasheet(PDF) 735 Page - Renesas Technology Corp |
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SH7261 Datasheet(HTML) 735 Page - Renesas Technology Corp |
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735 / 1348 page ![]() Section 16 Serial Communication Interface with FIFO (SCIF) Rev. 2.00 Sep. 07, 2007 Page 703 of 1312 REJ09B0320-0200 16.3.11 Serial Port Register (SCSPTR) SCSPTR controls input/output and data of pins multiplexed to SCIF function. Bits 3 and 2 can control input/output data of SCK pin. Bits 1 and 0 can input data from RxD pin and output data to TxD pin, so they control break of serial transmitting/receiving. The CPU can always read and write to SCSPTR. SCSPTR is initialized to H'0050 by a power-on reset or in deep standby mode. 15 14 13 12 11 10 987654321 0 0000000001010 0 R R R R R R R R R/W R/W R/W R/W Bit: Initial value: R/W: ———————— RRRR ———— —— SCKIO SCKDT SPB2 IO SPB2 DT Bit Bit Name Initial Value R/W Description 15 to 7 — All 0 R Reserved These bits are always read as 0. The write value should always be 0. 6 — 1 R Reserved This bit is always read as 1. The write value should always be 1. 5 — 0 R Reserved This bit is always read as 0. The write value should always be 0. 4 — 1 R Reserved This bit is always read as 1. The write value should always be 1. 3 SCKIO 0 R/W SCK Port Input/Output Indicates input or output of the serial port SCK pin. When the SCK pin is actually used as a port outputting the SCKDT bit value, the CKE[1:0] bits in SCSCR should be cleared to 0. 0: SCKDT bit value not output to SCK pin 1: SCKDT bit value output to SCK pin |
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