SH7261 datasheet(738/1348 Pages) RENESAS

738 / 1348 page

Section 16 Serial Communication Interface with FIFO (SCIF)

Rev. 2.00 Sep. 07, 2007 Page 706 of 1312

REJ09B0320-0200

16.4

Operation

16.4.1

Overview

For serial communication, the SCIF has an asynchronous mode in which characters are

synchronized individually, and a clocked synchronous mode in which communication is

synchronized with clock pulses.

The SCIF has a 16-stage FIFO buffer for both transmission and receptions, reducing the overhead

of the CPU, and enabling continuous high-speed communication. The transmission format is

selected in the serial mode register (SCSMR), as shown in table 16.9. The SCIF clock source is

selected by the combination of the CKE1 and CKE0 bits in the serial control register (SCSCR), as

shown in table 16.10.

(1)

Asynchronous Mode

• Data length is selectable: 7 or 8 bits

• Parity bit is selectable. So is the stop bit length (1 or 2 bits). The combination of the preceding

selections constitutes the communication format and character length.

• In receiving, it is possible to detect framing errors, parity errors, receive FIFO data full,

overrun errors, receive data ready, and breaks.

• The number of stored data bytes is indicated for both the transmit and receive FIFO registers.

• An internal or external clock can be selected as the SCIF clock source.

 When an internal clock is selected, the SCIF operates using the on-chip baud rate

generator.

 When an external clock is selected, the external clock input must have a frequency 16 times

the bit rate. (The on-chip baud rate generator is not used.)

(2)

Clocked Synchronous Mode

• The transmission/reception format has a fixed 8-bit data length.

• In receiving, it is possible to detect overrun errors (ORER).

• An internal or external clock can be selected as the SCIF clock source.

 When an internal clock is selected, the SCIF operates using the on-chip baud rate

generator, and outputs a serial clock signal to external devices.

 When an external clock is selected, the SCIF operates on the input serial clock. The on-

chip baud rate generator is not used.

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