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SH7261 Datasheet(PDF) 794 Page - Renesas Technology Corp |
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SH7261 Datasheet(HTML) 794 Page - Renesas Technology Corp |
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794 / 1348 page ![]() Section 17 I 2C Bus Interface 3 (IIC3) Rev. 2.00 Sep. 07, 2007 Page 762 of 1312 REJ09B0320-0200 17.4.8 Example of Use Flowcharts in respective modes that use the I 2C bus interface 3 are shown in figures 17.18 to 17.21. BBSY=0 ? No TEND=1 ? No Yes Start [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [13] [14] [15] Initialize Set MST and TRS in ICCR1 to 1 Write 1 to BBSY and 0 to SCP Write transmit data in ICDRT Write 0 to BBSY and SCP Set MST and TRS in ICCR1 to 0 Read BBSY in ICCR2 Read TEND in ICSR Read ACKBR in ICIER Master receive mode Yes ACKBR=0 ? Write transmit data in ICDRT Read TDRE in ICSR Read TEND in ICSR Clear TEND in ICSR Read STOP in ICSR Clear TDRE in ICSR End Write transmit data in ICDRT Transmit mode? No Yes TDRE=1 ? Last byte? STOP=1 ? No No No No No Yes Yes TEND=1 ? Yes Yes Yes [1] Test the status of the SCL and SDA lines. [2] Set master transmit mode. [3] Issue the start condition. [4] Set the first byte (slave address + R/ W) of transmit data. [5] Wait for 1 byte to be transmitted. [6] Test the acknowledge transferred from the specified slave device. [7] Set the second and subsequent bytes (except for the final byte) of transmit data. [8] Wait for ICDRT empty. [9] Set the last byte of transmit data. [10] Wait for last byte to be transmitted. [11] Clear the TEND flag. [12] Clear the STOP flag. [13] Issue the stop condition. [14] Wait for the creation of stop condition. [15] Set slave receive mode. Clear TDRE. [12] Clear STOP in ICSR Figure 17.18 Sample Flowchart for Master Transmit Mode |
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