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SH7261 Datasheet(PDF) 984 Page - Renesas Technology Corp |
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SH7261 Datasheet(HTML) 984 Page - Renesas Technology Corp |
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984 / 1348 page ![]() Section 21 CD-ROM Decoder (ROM-DEC) Rev. 2.00 Sep. 07, 2007 Page 952 of 1312 REJ09B0320-0200 21.3.1 ROM-DEC Enable Control Register (CROMEN) CROMEN enables subcode processing and CD-ROM decoding, and stops CD-ROM decoding forcibly. 76543210 Bit: Initial value: R/W: 00000000 R/W R/W R/W R/W R/W R/W R/W R/W SUBC_ EN CROM_ EN CROM_ STP — — ——— Bit Bit Name Initial Value R/W Description 7 SUBC_EN 0 R/W Subcode Processing Enable This bit should be set and cleared simultaneously with CROM_EN. It is automatically cleared when decoding is automatically stopped due to an abnormal condition or when CROM_STP = 1 6 CROM_EN 0 R/W CD-ROM Decoding Enable When this bit is set to 1, CD-ROM decoding starts after detection of a valid sync code. When the bit is cleared to 0, decoding stops on completion of the processing for the sector currently being decoded. This bit is automatically cleared when the automatic decode-stopping function woks or when CROM_STP = 1. 5 CROM_STP 0 R/W Forcible Stop of CD-ROM Decoding When this bit is set to 1, CD-ROM decoding is stopped immediately and the SUBC_EN and CROM_EN bits are automatically reset to 0. Before decoding can resume, this bit must be cleared to 0. 4 to 0 All 0 R/W Reserved These bits are always read as 0.The write value should always be 0. |
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