SH7261 datasheet(985/1348 Pages) RENESAS

985 / 1348 page

Section 21 CD-ROM Decoder (ROM-DEC)

Rev. 2.00 Sep. 07, 2007 Page 953 of 1312

REJ09B0320-0200

21.3.2

Sync Code-Based Synchronization Control Register (CROMSY0)

CROMSY0 selects the sync code maintenance function.

76543210

Bit:

Initial value:

R/W:

10001001

R/W

SY_

AUT

SY_

IEN

SY_

DEN

—

———

Bit

Bit Name

Initial

Value

R/W

Description

SY_AUT

R/W

Automatic CD-ROM Sync Code Maintenance Mode

When this bit is set to 1, automatic sync maintenance

(insertion of sync codes) is applied to obtain the CD-

ROM sync codes. While this bit is set, the settings of

the SY_IEN and SY_DEN bits are invalid.

SY_IEN

R/W

Enables the internal sync signal that is produced by the

counter in the CD-ROM decoder.

When this bit is set while SY_AUT = 0, synchronization

of the CD-ROM data is in interpolated mode, i.e. driven

by the internal counter.

SY_DEN

R/W

Selects constant monitoring for the sync code in the

input data and bases synchronization solely on

detection of the code, regardless of the value of the

internal counter.

This bit is valid when SY_AUT = 0.



R/W

Reserved

This bit is always read as 0. The write value should

always be 0.



R/W

Reserved

This bit is always read as 1. The write value should

always be 1.

2, 1



All 0

R/W

Reserved

These bits are always read as 0. The write value should

always be 0.



R/W

Reserved

This bit is always read as 1. The write value should

always be 1.

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