SH7261 datasheet(1067/1348 Pages) RENESAS

1067 / 1348 page

Section 22 A/D Converter (ADC)

Rev. 2.00 Sep. 07, 2007 Page 1035 of 1312

REJ09B0320-0200

AN0 to AN7

3 k

Ω

20 pF

To A/D converter

Note: Values are reference values.

Figure 22.9 Analog Input Pin Equivalent Circuit

Table 22.7

Analog Input Pin Ratings

Item

Min.

Max.

Unit

Analog input capacitance



Allowable signal-source impedance



Ω

22.7.5

Permissible Signal Source Impedance

This LSI's analog input is designed such that conversion precision is guaranteed for an input signal

for which the signal source impedance is 5 k

Ω or less. This specification is provided to enable the

A/D converter's sample-and-hold circuit input capacitance to be charged within the sampling time;

if the sensor output impedance exceeds 5 k

Ω, charging may be insufficient and it may not be

possible to guarantee A/D conversion precision. However, for A/D conversion in single mode with

a large capacitance provided externally for A/D conversion in single mode, the input load will

essentially comprise only the internal input resistance of 3 k

Ω, and the signal source impedance is

ignored. However, as a low-pass filter effect is obtained in this case, it may not be possible to

follow an analog signal with a large differential coefficient (e.g., 5 mV/

µs or greater) (see

figure 22.10). When converting a high-speed analog signal, a low-impedance buffer should be

inserted.

SH7261 Datasheet(PDF) 1067 Page - Renesas Technology Corp