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SH7261 Datasheet(PDF) 1069 Page - Renesas Technology Corp |
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SH7261 Datasheet(HTML) 1069 Page - Renesas Technology Corp |
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1069 / 1348 page ![]() Section 23 D/A Converter (DAC) Rev. 2.00 Sep. 07, 2007 Page 1037 of 1312 REJ09B0320-0200 Section 23 D/A Converter (DAC) 23.1 Features • Resolution: 8 bits • Input channels: 2 • Minimum conversion time: Max. 10 µs (with 20 pF load) • Output voltage: 0 V to AVref • D/A output hold function in software standby mode • Module standby mode can be set AVCC AVref DA0 DA1 AVss Module data bus Peripheral bus 8-bit D/A Control circuit [Legend] DADR0: D/A data register 0 DADR1: D/A data register 1 DACR: D/A control register Figure 23.1 Block Diagram of D/A Converter |
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