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SH7261 Datasheet(PDF) 1073 Page - Renesas Technology Corp

Part # SH7261
Description  32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
PDF  1348 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7261 Datasheet(HTML) 1073 Page - Renesas Technology Corp

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Section 23 D/A Converter (DAC)
Rev. 2.00 Sep. 07, 2007 Page 1041 of 1312
REJ09B0320-0200
23.4
Operation
The D/A converter includes D/A conversion circuits for two channels, each of which can operate
independently. When the DAOE bit in DACR is set to 1, D/A conversion is enabled and the
conversion result is output.
An operation example of D/A conversion on channel 0 is shown below. Figure 23.2 shows the
timing of this operation.
1. Write the conversion data to DADR0.
2. Set the DAOE0 bit in DACR to 1 to start D/A conversion. The conversion result is output from
the analog output pin DA0 after the conversion time t
DCONV has elapsed. The conversion result
continues to be output until DADR0 is written to again or the DAOE0 bit is cleared to 0. The
output value is expressed by the following formula:
Contents of DADR
256
× AVref
3. If DADR0 is written to again, the conversion is immediately started. The conversion result is
output after the conversion time t
DCONV has elapsed.
4. If the DAOE0 bit is cleared to 0, analog output is disabled.
DADR0
DAOE0
DA0
tDCONV
tDCONV
Conversion data 1
Conversion
result 1
High-impedance state
DADR0
write cycle
Address
φ
DACR
write cycle
Conversion data 2
Conversion
result 2
[Legend]
tDCONV: D/A conversion time
DADR0
write cycle
DACR
write cycle
Figure 23.2 Example of D/A Converter Operation



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