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SH7261 Datasheet(PDF) 302 Page - Renesas Technology Corp |
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SH7261 Datasheet(HTML) 302 Page - Renesas Technology Corp |
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302 / 1348 page  Section 9 Bus State Controller (BSC) Rev. 2.00 Sep. 07, 2007 Page 270 of 1312 REJ09B0320-0200 (c) Procedure for Transition to and Recovery from Deep-Power-Down Mode Figure 9.28 shows the procedure for transitioning to deep-power-down mode. Halt access (1) Halt any DMA access to corresponding channels (2) Halt access to corresponding channels (EXENB = 0) by means of program assigned to other than to corresponding channel area (3) Confirm that EXENB has been cleared to 0 End auto-refresh Clear DRFEN bit in SDRFCNT1 to 0 Access enabled status EXENB = 1 in SDRAMC control register Start deep-power-down mode (1) Confirm that all status bits in SDSTR have been cleared to 0 (2) Set deep-power-down enable bit to 1 by means of program assigned to other than to corresponding channel area Deep-power-down mode Figure 9.28 Procedure for Transition to Deep-Power-Down Mode |
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