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SH7261 Datasheet(PDF) 305 Page - Renesas Technology Corp |
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SH7261 Datasheet(HTML) 305 Page - Renesas Technology Corp |
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305 / 1348 page ![]() Section 9 Bus State Controller (BSC) Rev. 2.00 Sep. 07, 2007 Page 273 of 1312 REJ09B0320-0200 CKIO ACT: Row and bank activation command RD: Read command PRA: Precharge-all command SDRAM command Data bus Multiple read ACT DSL RD RD RD RD PRA DSL d0 DRCD (ACR-RD) DRAS (ACT-PRA) DCL (RD-d) DPCG (PRA-next) d1 d2 d3 Figure 9.31 Multiple Read Timing Example 2 CKIO ACT: Row and bank activation command RD: Read command PRA: Precharge-all command SDRAM command Data bus Multiple read ACT DSL RD RD RD RD PRA DSL DSL d0 DRCD (ACT-RD) DRAS (ACT-PRA) DCL (RD-d) DPCG (PRA-next) d1 d2 d3 Figure 9.32 Multiple Read Timing Example 3 |
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