SH7672 datasheet(500/1292 Pages) RENESAS

500 / 1292 page

Section 13 Ethernet Controller Direct Memory Access Controller (E-DMAC)

Rev. 1.00 Nov. 14, 2007 Page 474 of 1262

REJ09B0437-0100

(b) Transmit Descriptor 1 (TD1)

TD1 specifies the transmit buffer length (maximum 64 Kbytes).

Bit:

Initial Value:

R/W:

Bit:

Initial Value:

R/W:

0000000000000000

RRRRRRRRRRRRRRRR

0000000000000000

RRRRRRRRRRRRRRRR

TDL[15:0]



Bit

Bit Name

Initial

value

R/W

Description

31 to 16

TDL[15:0]

All 0

R/W

Transmit Buffer Data Length

These bits specify the valid transfer byte length in the

corresponding transmit buffer.

When the one frame/multi-buffer system is specified

(TD0 and TFP = 10 or 00), the transfer byte length

specified in the descriptors at the start and midway

can be set in byte units.

15 to 0



All 0

Reserved

These bits are always read as 0. The write value

should always be 0.

(c)

Transmit Descriptor 2 (TD2)

TD2 specifies the 32-bit transmit buffer start address. The transmit buffer start address setting can

be aligned with a byte, a word, or a longword boundary.

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