SH7672 datasheet(111/1292 Pages) RENESAS

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Section 3

Floating-Point Unit (FPU)

Rev. 1.00

Nov. 14, 2007

Page 85 of 1262

REJ09B0437-0100

3.5

Floating-Point Exceptions

3.5.1

FPU Exception Sources

The exception sources are as follows:

• FPU error (E): When FPSCR.DN = 0 and a denormalized number is input (No error occurs in

the SH2A-FPU)

• Invalid operation (V): In case of an invalid operation, such as NaN input

• Division by zero (Z): Division with a zero divisor

• Overflow (O): When the operation result overflows

• Underflow (U): When the operation result underflows

• Inexact exception (I): When overflow, underflow, or rounding occurs

The FPU exception cause field in FPSCR contains bits corresponding to all of above sources E, V,

Z, O, U, and I, and the FPU exception flag and enable fields in FPSCR contain bits corresponding

to sources V, Z, O, U, and I, but not E. Thus, FPU errors cannot be disabled.

When an FPU exception occurs, the corresponding bit in the FPU exception cause field is set to 1,

and 1 is added to the corresponding bit in the FPU exception flag field. When an FPU exception

does not occur, the corresponding bit in the FPU exception cause field is cleared to 0, but the

corresponding bit in the FPU exception flag field remains unchanged.

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