SH7672 datasheet(225/1292 Pages) RENESAS

Part #	SH7672

Description	32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series

PDF	1292 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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225 / 1292 page

Section 7

Bus State Controller (BSC)

Rev. 1.00 Nov. 14, 2007 Page 199 of 1262

REJ09B0437-0100

Bit

Bit Name

Initial

Value

R/W

Description

4, 3

TRWL[1:0]

R/W

Number of Auto-Precharge Startup Wait Cycles

Specify the number of minimum auto-precharge

startup wait cycles as shown below.

• Cycle number from the issuance of the WRITA

command by this LSI until the completion of auto-

precharge in the SDRAM.

Equivalent to the cycle number from the issuance

of the WRITA command until the issuance of the

ACTV command. Confirm that how many cycles

are required between the WRITE command receive

in the SDRAM and the auto-precharge activation,

referring to each SDRAM data sheet. And set the

cycle number so as not to exceed the cycle number

specified by this bit.

• Cycle number from the issuance of the WRITA

command until the issuance of the PRE command.

This is the case when accessing another low

address in the same bank in bank active mode.

00: No cycle

01: 1 cycle

10: 2 cycles

11: 3 cycles



Reserved

This bit is always read as 0. The write value should

always be 0.

SH7672 Datasheet(PDF) 225 Page - Renesas Technology Corp