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SH7672 Datasheet(PDF) 266 Page - Renesas Technology Corp

Part # SH7672
Description  32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series
PDF  1292 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7672 Datasheet(HTML) 266 Page - Renesas Technology Corp

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Section 7
Bus State Controller (BSC)
Rev. 1.00 Nov. 14, 2007 Page 240 of 1262
REJ09B0437-0100
Table 7.13
Relationship between BSZ[1:0], A3ROW[1:0], A3COL[1:0], and Address
Multiplex Output (3)
Setting
BSZ[1:0]
A3ROW[1:0]
A3COL[1:0]
11 (32 bits)
10 (13 bits)
01 (9 bits)
Output Pin of
This LSI
Row Address
Output
Column Address
Output
SDRAM Pin
Function
A17
A26
A17
Unused
A16
A25*
2
A25*
2
A14 (BA1)
A15
A24*
2
A24*
2
A13 (BA0)
Specifies bank
A14
A23
A14
A12
A13
A22
A13
A11
Address
A12
A21
L/H*
1
A10/AP
Specifies
address/precharge
A11
A20
A11
A9
A10
A19
A10
A8
A9
A18
A9
A7
A8
A17
A8
A6
A7
A16
A7
A5
A6
A15
A6
A4
A5
A14
A5
A3
A4
A13
A4
A2
A3
A12
A3
A1
A2
A11
A2
A0
Address
A1
A10
A1
A0
A9
A0
Unused
Example of connected memory
512-Mbit product (4 Mwords
× 32 bits × 4 banks, column 9 bits product): 1
256-Mbit product (4 Mwords
× 16 bits × 4 banks, column 9 bits product): 2
Notes: 1. L/H is a bit used in the command specification; it is fixed at L or H according to the
access mode.
2. Bank address specification



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