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SH7672 Datasheet(PDF) 263 Page - Renesas Technology Corp

Part # SH7672
Description  32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series
PDF  1292 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7672 Datasheet(HTML) 263 Page - Renesas Technology Corp

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Section 7
Bus State Controller (BSC)
Rev. 1.00 Nov. 14, 2007 Page 237 of 1262
REJ09B0437-0100
Table 7.11
Relationship between BSZ[1:0], A3ROW[1:0], A3COL[1:0], and Address
Multiplex Output (1)-2
Setting
BSZ[1:0]
A3ROW[1:0]
A3COL[1:0]
11 (32 bits)
01 (12 bits)
00 (8 bits)
Output Pin of
This LSI
Row Address
Output
Column Address
Output
SDRAM Pin
Function
A17
A25
A17
A16
A24
A16
Unused
A15
A23*
2
A23*
2
A13 (BA1)
A14
A22*
2
A22*
2
A12 (BA0)
Specifies bank
A13
A21
A13
A11
Address
A12
A20
L/H*
1
A10/AP
Specifies
address/precharge
A11
A19
A11
A9
A10
A18
A10
A8
A9
A17
A9
A7
A8
A16
A8
A6
A7
A15
A7
A5
A6
A14
A6
A4
A5
A13
A5
A3
A4
A12
A4
A2
A3
A11
A3
A1
A2
A10
A2
A0
Address
A1
A9
A1
A0
A8
A0
Unused
Example of connected memory
128-Mbit product (1 Mword
× 32 bits × 4 banks, column 8 bits product): 1
64-Mbit product (1 Mword
× 16 bits × 4 banks, column 8 bits product): 2
Notes: 1. L/H is a bit used in the command specification; it is fixed at L or H according to the
access mode.
2. Bank address specification
3. Applicable only to 64-bit products.



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