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SH7672 Datasheet(PDF) 305 Page - Renesas Technology Corp

Part # SH7672
Description  32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7670 Series
PDF  1292 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7672 Datasheet(HTML) 305 Page - Renesas Technology Corp

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Section 7
Bus State Controller (BSC)
Rev. 1.00 Nov. 14, 2007 Page 279 of 1262
REJ09B0437-0100
(1)
Basic Timing for Memory Card Interface
Figure 7.37 shows the basic timing of the PCMCIA IC memory card interface. When areas 5 and 6
are specified as the PCMCIA interface, the bus is accessed with the IC memory card interface
according to the SA[1:0] bit settings in CS5WCR and CS6WCR. If the external bus frequency
(CKIO) increases, the setup times and hold times for the address pins (A25 to A0), card enable
signals (
CE1A, CE2A, CE1B, CE2B), and write data (D15 to D0) to the RD and WE signals
become insufficient. To prevent this error, this LSI enables the setup times and hold times for
areas 5 and 6 to be specified independently, using CS5WCR and CS6WCR. In the PCMCIA
interface, as in the normal space interface, a software wait or hardware wait using the
WAIT pin
can be inserted. Figure 7.38 shows the PCMCIA memory bus wait timing.
Tpcm1w
CKIO
A25 to A0
CExx
RD/
WR
RD
D15 to D0
WE
D15 to D0
BS
Read
Write
Tpcm2
Tpcm1
Tpcm1w
Tpcm1w
Figure 7.37
Basic Access Timing for PCMCIA Memory Card Interface



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