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ADS1282IPWR Datasheet(PDF) 13 Page - Texas Instruments |
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ADS1282IPWR Datasheet(HTML) 13 Page - Texas Instruments |
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13 / 52 page ![]() INPUT-REFERRED NOISE SNR=20log FSR RMS N RMS (1) IDLE TONES NOISE PERFORMANCE OPERATING MODE ADS1282 www.ti.com ........................................................................................................................................ SBAS418E – SEPTEMBER 2007 – REVISED OCTOBER 2008 The device features unipolar and bipolar analog power supplies (AVDD and AVSS, respectively) for The input-referred noise is related to SNR by input range flexibility and a digital supply accepting Equation 1: 1.8V to 3.3V. The analog supplies may be set to +5V to accept unipolar signals (with input offset) or set lower in the range of ±2.5V to accept true bipolar input signals (ground referenced). where: An internal sub-regulator is used to supply the digital core from DVDD. The BYPAS pin (pin 28) is the FSRRMS = Full-scale range RMS = VREF/2 × √2 × sub-regulator output and requires a 1 µF capacitor for PGA noise reduction. BYPAS should not be used to drive NRMS = Noise RMS (input-referred) external circuitry. The ADS1282 modulator incorporates an internal The ADS1282 offers outstanding noise performance dither signal that randomizes the idle tone energy. (SNR). SNR depends on the data rate, the PGA Low-level idle tones may still be present, typically setting, and the mode (high-resolution or low-power). –137dB below full-scale. The low-level idle tones can As the bandwidth is reduced by decreasing the data be shifted out of the passband with an external offset rate, the SNR improves correspondingly. Similarly, as = 20mV/PGA. See the Application Information section the PGA gain is increased, the SNR decreases. In for the recommended offset circuit. low-power mode, the SNR decreases 3dB for each setting. Table 1 summarizes the noise performance versus data rate, PGA setting, and mode. For applications where minimal power consumption is important, the low-power mode can be selected (register bit MODE = 0). In low-power mode, the power is reduced to 17mW (from 25mW) and SNR decreases an average of 3dB. The default mode is high-resolution. Table 1. Signal-to-Noise Ratio (dB)(1) PGA (High-Resolution Mode) PGA (Low-Power Mode) DATA RATE (SPS) 1 2 4 8 16 32 64 1 2 4 8 16 32 64 250 130 130 129 128 125 119 114 127 127 126 125 122 116 111 500 127 127 126 125 122 116 111 124 124 123 122 119 113 108 1000 124 124 123 122 119 113 108 121 121 120 119 116 110 105 2000 121 121 120 119 116 111 106 118 118 117 116 113 108 103 4000 118 118 117 116 113 108 103 115 115 114 113 110 105 100 (1) VIN = 20mVDC/PGA. Copyright © 2007–2008, Texas Instruments Incorporated Submit Documentation Feedback 13 Product Folder Link(s): ADS1282 |
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