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38K2 Datasheet(PDF) 198 Page - Renesas Technology Corp |
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38K2 Datasheet(HTML) 198 Page - Renesas Technology Corp |
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198 / 358 page ![]() 2.4 Serial I/O Rev.2.00 Oct 15, 2006 page 49 of 112 38K2 Group REJ09B0338-0200 APPLICATION Fig. 2.4.15 Registers setting related to transmitting side Serial I/O status register (Address : 2716) SIOSTS Transmit buffer empty flag • Confirm that the data has been transferred from Transmit buffer register to Transmit shift register. • When this flag is “1”, it is possible to write the next transmission data in to Transmit buffer register. Transmitting side Transmit shift register shift completion flag Confirm completion of transmitting 1-byte data with this flag. “1” : Transmit shift completed b7 b0 Interrupt edge selection register (Address : 0FF316) INTEDGE INT1 interrupt edge selection bit : Falling edge active b7 b0 Baud rate generator (Address : 0FE216) BRG Set “division ratio – 1”. 11 b7 b0 Serial I/O control register (Address : 0FE016) SIOCON BRG counter source selection bit : f(XIN) Serial I/O synchronous clock selection bit : BRG/4 Transmit enable bit : Transmit enabled Receive enable bit : Receive disabled Serial I/O mode selection bit : Clock synchronous serial I/O Serial I/O enable bit : Serial I/O enabled b7 b0 0 0 0 11 1 0 |
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