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38K2 Datasheet(PDF) 200 Page - Renesas Technology Corp

Part # 38K2
Description  RENESAS 8-BIT SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 38000 SERIES
PDF  358 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

38K2 Datasheet(HTML) 200 Page - Renesas Technology Corp

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2.4 Serial I/O
Rev.2.00
Oct 15, 2006
page 51 of 112
38K2 Group
REJ09B0338-0200
APPLICATION
Figure 2.4.17 shows a control procedure of the transmitting side, and Figure 2.4.18 shows a control
procedure of the receiving side.
Fig. 2.4.17 Control procedure of transmitting side
RESET
Initialization
SIOCON (Address : 0FE016)
← 1101xx002
BRG
(Address : 0FE216)
← 12 – 1
INTEDGE (Address : 0FF316), bit2
← 0
TB/RB (Address : 2616)
The first byte of a
transmission data
• Transmission data write
Transmit buffer empty flag is set to “0”
by this writing.
• Detection of INT1 falling edge
IREQ2 (Address:3D16), bit0?
1
0
• Judgment of transferring from Transmit
buffer register to Transmit shift register
(Transmit buffer empty flag)
SIOSTS (Address : 2716), bit0?
1
0
TB/RB (Address : 2616)
• Transmission data write
Transmit buffer empty flag is set to “0”
by this writing.
The second byte of a
transmission data
• Judgment of transferring from Transmit
buffer register to Transmit shift register
(Transmit buffer empty flag)
SIOSTS (Address : 2716), bit0?
1
0
• Judgment of shift completion of Transmit shift register
(Transmit shift register shift completion flag)
SIOSTS (Address : 2716), bit2?
1
0
IREQ2 (Address : 3D16), bit0
← 0
q x: This bit is not used here. Set it to “0” or “1” arbitrarily.



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