SH7014 datasheet(545/754 Pages) RENESAS

545 / 754 page

18. 128 kB Flash Memory (F-ZTAT)

Rev.5.00 Sep. 27, 2007 Page 511 of 716

REJ09B0398-0500

18.7.2

Program-Verify Mode

In program-verify mode, the data written in program mode is read to check whether it has been

correctly written in the flash memory.

After the elapse of a given programming time, the programming mode is exited (the P bit in

FLMCR1 is cleared, then the PSUn bit is cleared at least 10

μs later). The watchdog timer is

cleared after the elapse of 10

μs or more, and the operating mode is switched to program-verify

mode by setting the PV bit in FLMCR1. Before reading in program-verify mode, a dummy write

of H'FF data should be made to the addresses to be read. The dummy write should be executed

after the elapse of 4

μs or more. When the flash memory is read in this state (verify data is read in

32-bit units), the data at the latched address is read. Wait at least 2

μs after the dummy write

before performing this read operation. Next, the written data is compared with the verify data, and

reprogram data is computed (see figure 18.13) and transferred to the reprogram data area. After 32

bytes of data have been verified, exit program-verify mode, wait for at least 4

μs, then clear the

SWE bit in FLMCR1. If reprogramming is necessary, set program mode again, and repeat the

program/program-verify sequence as before. However, ensure that the program/program-verify

sequence is not repeated more than 1000 times on the same bits.

SH7014 Datasheet(PDF) 545 Page - Renesas Technology Corp