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7641 Datasheet(PDF) 365 Page - Renesas Technology Corp |
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7641 Datasheet(HTML) 365 Page - Renesas Technology Corp |
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365 / 385 page ![]() Rev.2.00 Aug 28, 2006 page 86 of 108 7641 Group REJ09B0336-0200 APPENDIX 3.5 Control registers USB endpoint x OUT write count register Low b7 b6 b5 b4 b3 b2 b1 b0 USB endpoint x OUT write count register Low (WRT_CNTL : address 5D16) b 0 1 2 4 Name 0 Functions At reset R W 0 0 0 0 5 0 6 7 0 0 3 Contains the low-order 8 bits of the number of bytes in endpoint x OUT FIFO. ✕ ✕ ✕ ✕ ✕ ✕ ✕ ✕ USB endpoint x OUT write count register High b7 b6 b5 b4 b3 b2 b1 b0 USB endpoint x OUT write count register High (WRT_CNTH : address 5E16) b 0 1 2 4 Name 0 Functions At reset R W 0 0 0 0 5 0 6 7 0 0 3 ✕ ✕ ✕ ✕ ✕ ✕ ✕ ✕ Nothing is arranged for these bits. These are write disable bits. When these bits are read out, the contents are “0”. Contains the high-order 2 bits of the number of bytes in endpoint x OUT FIFO. Fig. 3.5.59 Structure of USB endpoint x (x = 0 to 4) OUT write count registers Low, High |
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