7641 datasheet(366/385 Pages) RENESAS

366 / 385 page

Rev.2.00

Aug 28, 2006

page 87 of 108

7641 Group

REJ09B0336-0200

APPENDIX

3.5 Control registers

USB endpoint FIFO mode register

b7 b6 b5 b4 b3 b2 b1 b0

USB endpoint FIFO mode register

(USBFIFOMR : address 5F16)

Name

Functions

At reset R W

For endpoint 1

b4b2b1b0

✕ 0 0 0 : IN 512-byte, OUT 800-byte

✕ 0 0 1 : IN 1024-byte, OUT 1024-byte

✕ 0 1 0 : IN 0-byte, OUT 2048-byte

✕ 0 1 1 : IN 2048-byte, OUT 0-byte

✕ 1 0 0 : IN 768-byte, OUT 1280-byte

✕ 1 0 1 : IN 880-byte, OUT 1168-byte

For endpoint 2

b4b2b1b0

0 ✕ ✕ ✕ : IN 32-byte, OUT 32-byte

1 ✕ ✕ ✕ : IN 128-byte, OUT 128-byte

FIFO size selection bit

(Note)

Nothing arranged for these bits. Fix these bits to “0”.

Note: The value set into “x” is invalid.

Fig. 3.5.60 Structure of USB endpoint FIFO mode register

USB endpoint x FIFO register

b7 b6 b5 b4 b3 b2 b1 b0

USB endpoint x FIFO register

(USBFIFOx: addresses 6016, 6116, 6216, 6316, 6416)

Undefined

Functions

At reset R W

Undefined

qThis is Endpoint x IN/OUT FIFO.

qWrite a data to be transmitted into this IN FIFO.

qRead a received data from this OUT FIFO.

Fig. 3.5.61 Structure of USB endpoint x (x = 0 to 4) FIFO register

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