7641 datasheet(166/385 Pages) RENESAS

166 / 385 page

Rev.2.00

Aug 28, 2006

page 35 of 148

7641 Group

REJ09B0336-0200

APPLICATION

2.2 Timer

Fig. 2.2.27 Related registers setting

ICONB

TYLFF16

TYH

FF16

CPMA

CPU mode register A (address 0016)

Processor mode bits

Stack page select bit

Main clock (XIN-XOUT): Oscillating

Internal system clock: f(XIN)

Set an initial value.

Interrupt control register B (address 0616)

Timer YL (low) (address 2216)

Timer YH (high) (address 2316)

Timer Y interrupt: Enabled

CCR

Clock control register (address 1F16)

System clock selection

00 0 0

P4D

Port P4 direction register (address 1916)

Set to intput mode.

ICONC

Interrupt control register C (address 0716)

CNTR1 interrupt: Enabled

TYM

Timer Y mode register (address 2816)

Timer Y write control: Written at the same time

TYOUT output: Disabled

Timer Y count source:

φ / 64

Period measurement mode

Measuring period from rising to rising edge of CNTR1

Timer Y count: Stopped (Set to “0” after initialization.)

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