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7641 Datasheet(PDF) 190 Page - Renesas Technology Corp |
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7641 Datasheet(HTML) 190 Page - Renesas Technology Corp |
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190 / 385 page  Rev.2.00 Aug 28, 2006 page 59 of 148 7641 Group REJ09B0336-0200 APPLICATION 2.4 UART Fig. 2.4.10 Structure of Interrupt control register A Interrupt control register A b7 b6 b5 b4 b3 b2 b1 b0 Interrupt control register A (ICONA : address 0516) b 0 1 2 3 4 5 6 7 Name 0 Functions At reset R W 0 0 0 0 0 0 USB function interrupt enable bit INT1 interrupt enable bit DMAC0 interrupt enable bit UART1 receive buffer full interrupt enable bit INT0 interrupt enable bit 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled USB SOF interrupt enable bit DMAC1 interrupt enable bit UART1 transmit interrupt enable bit 0 Interrupt control register B b7 b6 b5 b4 b3 b2 b1 b0 Interrupt control register B (ICONB : address 0616) b 0 1 2 3 4 5 6 7 Name 0 Functions At reset R W 0 0 0 0 0 0 UART1 summing error interrupt enable bit UART2 summing error interrupt enable bit Timer X interrupt enable bit Timer 1 interrupt enable bit UART2 transmit interrupt enable bit 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled 0 : Interrupt disabled 1 : Interrupt enabled UART2 receive buffer full interrupt enable bit Timer Y interrupt enable bit Timer 2 interrupt enable bit 0 Fig. 2.4.11 Structure of Interrupt control register B |
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