7641 datasheet(335/385 Pages) RENESAS

335 / 385 page

Rev.2.00

Aug 28, 2006

page 56 of 108

7641 Group

REJ09B0336-0200

APPENDIX

3.5 Control registers

Port P2 pull-up control register

b7 b6 b5 b4 b3 b2 b1 b0

Port P2 pull-upt control register

(PUP2 : address 1216)

Name

Functions

At reset R W

0 : Disabled

1 : Enabled

0 : Disabled

1 : Enabled

0 : Disabled

1 : Enabled

0 : Disabled

1 : Enabled

0 : Disabled

1 : Enabled

0 : Disabled

1 : Enabled

Port P26 pull-up control bit

0 : Disabled

1 : Enabled

Port P27 pull-up control bit

0 : Disabled

1 : Enabled

Port P20 pull-up control bit

Port P21 pull-up control bit

Port P22 pull-up control bit

Port P23 pull-up control bit

Port P24 pull-up control bit

Port P25 pull-up control bit

USB control register

b7 b6 b5 b4 b3 b2 b1 b0

USB control register

(USBC : address 1316)

Name

Functions

At reset R W

USB line driver current

control bit (USBC3)

USB line driver supply

enable bit (USBC4) (Note 1)

USB SOF port select bit

(USBC6)

USB artificial SOF enable

bit (USBC2)

0 : In default state after power-on/reset

1 : In default state after USB reset signal

received

0 : Artificial SOF disabled

1 : Artificial SOF enabled

0 : High current mode

1 : Low current mode

0 : Line driver disabled

1 : Line driver enabled

0 : 48 MHz clock to the USB block disabled

1 : 48 MHz clock to the USB block enabled

0 : SOF output disabled

1 : SOF output enabled

USB enable bit (USBC7)

0 : USB block disabled (Note 2)

1 : USB block enabled

USB default state selection

bit (USBC1)

USB clock enable bit

(USBC5)

Fix this bit to “0”.

Notes 1: When using the MCU in Vcc = 3.3 V, set this bit to “0” and disable the built-in DC-

DC converter.

2: Setting this bit to 0” causes the contents of all USB registers to have the values at

reset.

Fig. 3.5.15 Structure of Port P2 pull-up control register

Fig. 3.5.16 Structure of USB control register

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