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SH7018 Datasheet(PDF) 361 Page - Renesas Technology Corp |
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SH7018 Datasheet(HTML) 361 Page - Renesas Technology Corp |
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361 / 431 page  345 BF WAIT_13 ; RTS NOP ; ADATABUFF .RES.B 128 ; Additional programming RAM area RDATABUFF .RES.B 128 ; Reprogramming RAM area 16.7.3 Erase Mode Flash memory is erased one block at a time using the method shown in figure 16.13, Erase/Erase- Verify Flowchart (Single-Block Erasure). To perform data or program erasure, set the 1-bit flash memory area to be erased in erase block register 1 (EBR1) and erase block register 2 (EBR2) at least 1 µs after setting the SWE bit to 1 in flash memory control register 1 (FLMCR1). Next, the watchdog timer is set to prevent overprogramming in the event of program runaway, etc. After this, preparation for erase mode (erase setup) is carried out by setting the ESU bit in FLMCR1, and after the elapse of 100 µs or more, the operating mode is switched to erase mode by setting the E bit in FLMCR1. The time during which the E bit is set is the flash memory erase time. Ensure that the erase time does not exceed 10 ms. Note: With flash memory erasing, preprogramming (setting all memory data in the memory to be erased to all “0”) is not necessary before starting the erase procedure. |
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