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SH7018 Datasheet(PDF) 122 Page - Renesas Technology Corp |
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SH7018 Datasheet(HTML) 122 Page - Renesas Technology Corp |
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122 / 431 page ![]() 106 • Bits 3 to 0—Modes 3 to 0 (MD3 to MD0): These bits set the timer operation mode. Bit 3: MD3 Bit 2: MD2 Bit 1: MD1 Bit 0: MD0 Description 0000 Normal operation (Initial value) 1 Reserved (do not set) 1 0 PWM mode 1 1 PWM mode 2 01 ** Reserved (Do not set) 1 *** Reserved (Do not set) *: Don’t care 8.2.3 Timer I/O Control Register (TIOR) The TIOR is a register that controls the TGR. The MTU has four TIOR registers, two for channel 0, and one each for channels 1 and 2. TIOR is initialized to H'00 by a power-on reset. Channel 0: TIOR0H Bit: 7 6 5 4 3 2 1 0 — IOB2 IOB1 IOB0 IOA3 IOA2 IOA1 IOA0 Initial value: 0 0 0 0 0 0 0 0 R/W: R R/W R/W R/W R/W R/W R/W R/W Channels 1 and 2: TIOR1, TIOR2 Bit: 7 6 5 4 3 2 1 0 IOB3 IOB2 IOB1 IOB0 IOA3 IOA2 IOA1 IOA0 Initial value: 0 0 0 0 0 0 0 0 R/W: R/W R/W R/W R/W R/W R/W R/W R/W Bits 7 to 4—I/O Control B3 to B0 (IOB3 to IOB0): These bits set the TGRB register function. Bit 7 of TIOR0H is reserved bit. It is always read as 0. The write value should always be 0. Bits 3 to 0—I/O Control A3 to A0 (IOA3 to IOA0): These bits set the TGRA register function. |
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