SH7018 datasheet(119/431 Pages) RENESAS

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103

Bit 4:

CKEG1

Bit 3:

CKEG0 Description

Count on rising edges

(Initial value)

Count on falling edges

Count on both rising and falling edges

Notes: 1. X: 0 or 1, don’t care.

2. Internal clock edge selection is effective when the input clock is

φ/4 or slower. These

settings are ignored when

φ/1, or the overflow of another channel is selected for the

input clock.

• Bits 2 to 0—Timer Prescaler 2 to 0 (TPSC2 to TPSC0): TPSC2 to TPSC0 select the counter

clock source for the TCNT. An independent clock source can be selected for each channel.

Table 8.4 shows the possible settings for each channel.

Table 8.4

MTU Clock Sources

Internal Clock

Other Channel

Channel

φφφφ/1

φφφφ/4

φφφφ/16

φφφφ/64

φφφφ/256

φφφφ/1024

Overflow

OOOOX

OOOOOX

OOOOX

Note:

Symbols: O: Setting possible

X: Setting not possible

Channel 0:

Bit 2:

TPSC2

Bit 1:

TPSC1

Bit 0:

TPSC0

Description

Internal clock: count with

φ/1

(Initial value)

Internal clock: count with

φ/4

Internal clock: count with

φ/16

Internal clock: count with

φ/64

Reserved (Do not set)

SH7018 Datasheet(PDF) 119 Page - Renesas Technology Corp

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