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SH7018 Datasheet(PDF) 152 Page - Renesas Technology Corp |
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SH7018 Datasheet(HTML) 152 Page - Renesas Technology Corp |
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152 / 431 page  136 Table 8.7 lists the combinations of PWM output pins and registers. Table 8.7 Combinations of PWM Output Pins and Registers Output Pin Channel Register PWM Mode 1 PWM Mode 2 0 (AB pair) TGR0A TGR0B TIOC0A TIOC 0A 0 (CD pair) TGR0C TGR0D TIOC0C TIOC 0C 1 TGR1A TGR1B TIOC1A TIOC 1A TIOC 1B 2 TGR2A TGR2B TIOC2A TIOC 2A TIOC 2B Note: PWM output of the period setting TGR is not possible in PWM mode 2. Procedure for Selecting the PWM Mode (Figure 8.23): 1. Set bits TPSC2 to TPSC0 in the TCR to select the counter clock source. At the same time, set bits CKEG1 and CKEG0 in the TCR to select the desired edge of the input clock. 2. Set bits CCLR2 to CCLR0 in the TCR to select the TGR to be used as a counter clear source. 3. Set the period in the TGR selected in step 2, and the duty cycle in another TGR. 4. Using the timer I/O control register (TIOR), set the TGR selected in step 3 to act as an output compare register, and select the initial value and output value. 5. Set the MD3 to MD 0 bits in TMDR to select the PWM mode. 6. Set the CST bit in the TSTR to 1 to let the TCNT start counting. |
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