SH7018 datasheet(222/431 Pages) RENESAS

222 / 431 page

206

Bit 4: O/

Description

Even parity

(Initial value)

If even parity is selected, the parity bit is added to transmit data to make

an even number of 1s in the transmitted character and parity bit

combined. Receive data is checked to see if it has an even number of

1s in the received character and parity bit combined.

Odd parity

If odd parity is selected, the parity bit is added to transmit data to make

an odd number of 1s in the transmitted character and parity bit

combined. Receive data is checked to see if it has an odd number of 1s

in the received character and parity bit combined.

• Bit 3—Stop Bit Length (STOP): Selects one or two bits as the stop bit length.

In receiving, only the first stop bit is checked, regardless of the STOP bit setting. If the second

stop bit is 1, it is treated as a stop bit, but if the second stop bit is 0, it is treated as the start bit

of the next incoming character.

Bit 3: STOP

Description

One stop bit

(Initial value)

In transmitting, a single bit of 1 is added at the end of each transmitted

character.

Two stop bits

In transmitting, two bits of 1 are added at the end of each transmitted

character.

In receiving, only the first stop bit is checked, regardless of the STOP bit setting. If the second

stop bit is 1, is it treated as a stop bit, but if the second stop bit is 0, it is treated as the start bit of

the next character to be transmitted.

• Bit 2—Multiprocessor Mode (MP): Selects multiprocessor format. When multiprocessor

format is selected, settings of the parity enable (PE) and parity mode (O/

E) bits are ignored.

Also, the setting of the MP bit is valid only in the start-stop synchronous mode. The setting of

the MP bit is ignored in the clock synchronous mode. For the multiprocessor communication

function, see section 12.3.3, Multiprocessor Communication.

Bit 2: MP

Description

Multiprocessor function disabled

(Initial value)

Multiprocessor format selected

• Bits 1 and 0—Clock Select 1 and 0 (CKS1, CKS0): These bits select the internal clock source

of the on-chip baud rate generator. Four clock sources are available;

φ, φ/4, φ/16, or φ/64. For

SH7018 Datasheet(PDF) 222 Page - Renesas Technology Corp

SH7018 Datasheet(HTML) 222 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL