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SH7243 Datasheet(PDF) 280 Page - Renesas Technology Corp |
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SH7243 Datasheet(HTML) 280 Page - Renesas Technology Corp |
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280 / 1726 page ![]() Section 9 Bus State Controller (BSC) Rev. 1.00 Jun. 26, 2008 Page 250 of 1692 REJ09B0393-0100 9.3 Area Overview 9.3.1 Address Map In the architecture, this LSI has a 32-bit address space, which is divided into external address space and on-chip spaces (on-chip ROM, on-chip RAM, on-chip peripheral modules, and reserved areas) according to the upper bits of the address. The kind of memory to be connected and the data bus width are specified in each partial space. The address map for the external address space is listed below. |
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