SH7721 datasheet(838/1524 Pages) RENESAS

838 / 1524 page

Section 24

USB Host Controller (USBH)

Rev. 3.00 Jan. 18, 2008 Page 776 of 1458

REJ09B0033-0300

24.3.5

Hc Interrupt Enable Register (USBHIE)

Each enable bit in USBHIE corresponds to the related interrupt bit in USBHIS. USBHIE is used to

control an event to generate a hardware interrupt. A hardware interrupt is requested to the CPU

when a bit in USBHIE is set, a corresponding bit in USBHIE is set, and the MIE bit is set. As a

result, the USBHI bit in the interrupt request register 9 (IRR9) of the interrupt controller (INTC) is

set (the USBHI bit is used in common regardless of the content of the interrupt generation event).

Therefore, the USBHI bit can be used when an interrupt generation is detected by HCD.

Writing 1 in this register sets the corresponding bit, while writing 0 leaves the bit. When read, the

current value of this register is returned.

Bit

Bit Name

Initial

Value

R/W

Description

MIE

R/W

Master Interrupt Enable

Setting this bit to 0 is ignored by the host controller. When

this bit is set to 1, an interrupt generation by the event

specified in another bit in this register is enabled. This is

used by HDC that the master interrupt is enabled. When

an interrupt is detected by HCD, use the USBIH bit of the

interrupt controller (INTC).

0: Ignored

1: Interrupt generation due to the specified event enabled

R/W

Ownership Change Enable

0: Ignored

1: Interrupt generation due to Ownership Change enabled

29 to 7



All 0

Reserved

These bits are always read as 0. The write value should

always be 0.

RHSC

R/W

Root Hub Status Change Enable

0: Ignored

1: Interrupt generation due to Root Hub Status Change

enabled

FNO

R/W

Frame Number Overflow Enable

0: Ignored

1: Interrupt generation due to Frame Number Overflow

enabled

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