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SH7721 Datasheet(PDF) 969 Page - Renesas Technology Corp

Part # SH7721
Description  Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
PDF  1524 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7721 Datasheet(HTML) 969 Page - Renesas Technology Corp

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Section 26
LCD Controller (LCDC)
Rev. 3.00 Jan. 18, 2008 Page 907 of 1458
REJ09B0033-0300
26.4.4
Data Format
1. Packed 1bpp (Pixel Alignment in Byte is Big Endian) [Windows CE Recommended Format]
Address
+00
+01
+02
+03
…
+LAO+00
+LAO+01
+LAO+02
+LAO+03
…
[Bit]
(Byte0)
(Byte1)
MSB
LSB
↓ Top Left Pixel
P00
P08
P01 P02 P03 P04 P05 P06 P07
P10
P18
P11 P12 P13 P14 P15 P16 P17
76
5
4
3
2
1
0
…
P00 P01 P02 P03 P04 P05 P06 P07
P10 P11 P12 P13 P14 P15 P16 P17
…
…
…
…
…
Display Memory
4. Packed 1bpp (Pixel Alignment in Byte is Little Endian)
Address
+00
+01
+02
+03
…
+LAO+00
+LAO+01
+LAO+02
+LAO+03
…
[Bit]
(Byte0)
(Byte1)
MSB
LSB
P07
P08
P06 P05 P04 P03 P02 P01 P00
P17
P18
P16 P15 P14 P13 P12 P11 P10
76
5
4
3
2
1
0
…
…
Display Memory
2. Packed 2bpp (Pixel Alignment in Byte is Big Endian) [Windows CE Recommended Format]
Address
+00
+01
+02
+03
…
+LAO+00
+LAO+01
+LAO+02
+LAO+03
…
[Bit]
(Byte0)
(Byte1)
MSB
LSB
P00
P01
P02
P03
P04
P05
P06
P07
P10
P11
P12
P13
P14
P15
P16
P17
76
5
4
3
2
1
0
…
…
Display Memory
3. Packed 4bpp (Pixel Alignment in Byte is Big Endian) [Windows CE Recommended Format]
Address
+00
+01
+02
+03
…
+LAO+00
+LAO+01
+LAO+02
+LAO+03
…
[Bit]
(Byte0)
(Byte1)
(Byte2)
MSB
LSB
P00
P01
P02
P03
P10
P11
P12
P13
P04
P05
P14
P15
76
5
4
3
2
1
0
…
…
Display Memory
Display
Pn: Put 1-bit data
LAO: Line Address Offset
—Unused bits should be 0
↓ Top Left Pixel
P00 P01 P02 P03 P04 P05 P06 P07
P10 P11 P12 P13 P14 P15 P16 P17
…
…
…
…
Display
Pn: Put 1-bit data
LAO: Line Address Offset
—Unused bits should be 0
↓ Top Left Pixel
P00 P01 P02 P03 P04 P05 P06 P07
P10 P11 P12 P13 P14 P15 P16 P17
…
…
…
…
Display
Pn=Pn[1:0]: Put 2-bit data
LAO: Line Address Offset
—Unused bits should be 0
↓ Top Left Pixel
P00 P01 P02 P03 P04 P05 P06 P07
P10 P11 P12 P13 P14 P15 P16 P17
…
…
…
…
Display
Pn=Pn[3:0]: Put 4-bit data
LAO: Line Address Offset
—Unused bits should be 0



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