SH7721 datasheet(324/1524 Pages) RENESAS

324 / 1524 page

Section 8

Interrupt Controller (INTC)

Rev. 3.00 Jan. 18, 2008 Page 262 of 1458

REJ09B0033-0300

Bit

Bit Name

Initial Value

R/W

Description

2, 1



All 0

Reserved

These bits are always read as 0. The write value

should always be 0.

SDIR

R/W

SDI Interrupt Request

Indicates whether the SDI (SDHI) interrupt

request is generated.

0: SDI interrupt request is not generated

1: SDI interrupt request is generated

Note: On the models not having the SDHI, this bit

is reserved and always read as 0. The write

value should always be 0.

8.3.13

Interrupt Request Register 9 (IRR9)

IRR9 is an 8-bit register that indicates whether interrupt requests from the PCC, USBH, USBF,

and CMT are generated. This register is initialized to H'00 by a power-on reset or manual reset,

but is not initialized in standby mode.

Bit

Bit Name

Initial Value

R/W

Description

PCCIR

R/W

PCCI Interrupt Request

Indicates whether the PCCI (PCC) interrupt

request is generated.

0: PCCI interrupt request is not generated

1: PCCI interrupt request is generated

USBHIR

USBHI Interrupt Request

Indicates whether the USBHI (USBH) interrupt

request is generated.

0: USBHI interrupt request is not generated

1: USBHI interrupt request is generated



Reserved

This bit is always read as 0. The write value

should always be 0.

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