SH7721 datasheet(320/1524 Pages) RENESAS

320 / 1524 page

Section 8

Interrupt Controller (INTC)

Rev. 3.00 Jan. 18, 2008 Page 258 of 1458

REJ09B0033-0300

Bit

Bit Name

Initial Value

R/W

Description

ADCIR

R/W

ADCI Interrupt Request

Indicates whether the ADCI (ADC) interrupt

request is generated.

0: ADCI interrupt request is not generated

1: ADCI interrupt request is generated



Reserved

This bit is always read as 0. The write value

should always be 0.

DEI5R

R/W

DEI5 Interrupt Request

Indicates whether the DEI5 (DMAC) interrupt

request is generated.

0: DEI5 interrupt request is not generated

1: DEI5 interrupt request is generated

DEI4R

R/W

DEI4 Interrupt Request

Indicates whether the DEI4 (DMAC) interrupt

request is generated.

0: DEI4 interrupt request is not generated

1: DEI4 interrupt request is generated

3, 2



All 0

Reserved

These bits are always read as 0. The write value

should always be 0.

SCIF1IR

R/W

SCIF1I Interrupt Request

Indicates whether the SCIF1I (SCIF1) interrupt

request is generated.

0: SCIF1I interrupt request is not generated

1: SCIF1I interrupt request is generated

SCIF0IR

R/W

SCIF0I Interrupt Request

Indicates whether the SCIF0I (SCIF0) interrupt

request is generated.

0: SCIF0I interrupt request is not generated

1: SCIF0I interrupt request is generated

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