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SH7721 Datasheet(PDF) 323 Page - Renesas Technology Corp |
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SH7721 Datasheet(HTML) 323 Page - Renesas Technology Corp |
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323 / 1524 page ![]() Section 8 Interrupt Controller (INTC) Rev. 3.00 Jan. 18, 2008 Page 261 of 1458 REJ09B0033-0300 8.3.12 Interrupt Request Register 8 (IRR8) IRR8 is an 8-bit register that indicates whether interrupt requests from the SDHI, MMC, and AFEIF are generated. This register is initialized to H'00 by a power-on reset or manual reset, but is not initialized in standby mode. Note: Note: On the models not having the SDHI, the SDHI-related bits are reserved. The write value should always be 0. Bit Bit Name Initial Value R/W Description 7 MMCI3R 0 R/W MMCI3 Interrupt Request Indicates whether the MMCI3 (MMC) interrupt request is generated. 0: MMCI3 interrupt request is not generated 1: MMCI3 interrupt request is generated 6 MMCI2R 0 R/W MMCI2 Interrupt Request Indicates whether the MMCI2 (MMC) interrupt request is generated. 0: MMCI2 interrupt request is not generated 1: MMCI2 interrupt request is generated 5 MMCI1R 0 R/W MMCI1 Interrupt Request Indicates whether the MMCI1 (MMC) interrupt request is generated. 0: MMCI1 interrupt request is not generated 1: MMCI1 interrupt request is generated 4 MMCI0R 0 R/W MMCI0 Interrupt Request Indicates whether the MMCI0 (MMC) interrupt request is generated. 0: MMCI0 interrupt request is not generated 1: MMCI0 interrupt request is generated 3 AFECIR 0 R/W AFECI Interrupt Request Indicates whether the AFECI (AFEIF) interrupt request is generated. 0: AFECI interrupt request is not generated 1: AFECI interrupt request is generated |
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