ATAR092 datasheet(3/107 Pages) ATMEL

3 / 107 page

4535E–4BMCU–05/07

ATAR092/ATAR892

Introduction

The ATAR092/ATAR892 are members of Atmel’s family of 4-bit single-chip microcontrollers.

They contain ROM, RAM, parallel I/O ports, two 8-bit programmable multi-function

timer/counters, voltage supervisor, interval timer with watchdog function and a sophisticated

on-chip clock generation with integrated RC-, 32-kHz crystal- and 4-MHz crystal oscillators.

MARC4 Architecture

4.1

General Description

The MARC4 microcontroller consists of an advanced stack-based, 4-bit CPU core and on-chip

peripherals. The CPU is based on the HARVARD architecture with physically separate program

memory (ROM) and data memory (RAM). Three independent buses, the instruction bus, the

memory bus and the I/O bus, are used for parallel communication between ROM, RAM and

peripherals. This enhances program execution speed by allowing both instruction prefetching,

and a simultaneous communication to the on-chip peripheral circuitry. The extremely powerful

integrated interrupt controller with associated eight prioritized interrupt levels supports fast and

efficient processing of hardware events. The MARC4 is designed for the high-level programming

language qFORTH. The core includes both an expression and a return stack. This architecture

enables high-level language programming without any loss of efficiency or code density.

Figure 4-1.

MARC4 Core

Table 3-1.

Available Variants of ATAxx9x

Version

Type

ROM

E2PROM Peripheral

Packages

Flash device

ATAM893

4-Kbyte EEPROM

64 byte

SSO20

Production

ATAR092

4-Kbyte mask ROM

–

SSO20

Production

ATAR892

4-Kbyte mask ROM

64 byte

SSO20

Instruction

Decoder

CCR

TOS

ALU

RAM

Program

256 x 4-bit

MARC4 CORE

Clock

Reset

Sleep

Memory Bus

I/O Bus

Instruction

Bus

Reset

System

Clock

On-chip Peripheral Modules

Memory

Interrupt

Controller

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