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LT3437IDD Datasheet(PDF) 16 Page - Linear Technology |
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LT3437IDD Datasheet(HTML) 16 Page - Linear Technology |
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16 / 28 page ![]() 16 LT3437 3437fc VOUT 1V/DIV VIN = 12V 1ms/DIV 3437 F04 COUT = 100µF ILOAD = 200mA CSS = GND CSS = 0.1µF CSS = 0.01µF Figure 4. VOUT dV/dt Short-Circuit Considerations The LT3437 is a current mode controller. It uses the VC node voltage as an input to a current comparator which turns off the output switch on a cycle-by-cycle basis as this peak current is reached. The internal clamp on the VC node, nominally 1.5V, then acts as an output switch peak current limit. This action becomes the switch current limit specification. The maximum available output power is then determined by the switch current limit. A potential controllability problem could occur under short-circuit conditions. If the power supply output is short circuited, the feedback amplifier responds to the low output voltage by raising the control voltage, VC, to its peak current limit value. Ideally, the output switch would be turned on, and then turned off as its current exceeded the value indicated by VC. However, there is finite response time involved in both the current comparator and turn-off of the output switch. This results in a minimum on time tON(MIN). When combined with the large ratio of VIN to (VF + I • R), the diode forward voltage plus inductor I • R voltage drop, the potential exists for a loss of control. Expressed mathematically the requirement to maintain control is: ft VI R V ON F IN • • ≤ + where: f = switching frequency tON = switch on time VF = diode forward voltage VIN = Input voltage I • R = inductor I • R voltage drop If this condition is not observed, the current will not be limited at IPK but will cycle-by-cycle ratchet up to some higher value. Using the nominal LT3437 clock frequency of 200kHz, a VIN of 40V and a (VF + I • R) of say 0.7V, the maximum tON to maintain control would be approximately 90ns, an unacceptably short time. The solution to this dilemma is to slow down the oscillator to allow the current in the inductor to drop to a sufficiently low value such that the current does not continue to ratchet higher. When the FB pin voltage is abnormally low, thereby indicating some sort of short-circuit condition, the oscillator frequency will be reduced. Oscillator fre- quency is reduced by a factor of 10 when the FB pin voltage is below 0.4V and increases linearly to its typical value of 200kHz at a FB voltage of 0.95V (see Typical Performance Characteristics). These oscillator frequency reductions during short-circuit conditions allow the LT3437 to main- tain current control SOFT-START For applications where [VIN/(VOUT + VF)] >10 or large input surge currents cannot be tolerated, the LT3437 soft-start feature should be used to control the output capacitor charge rate during start-up, or during recovery from an output short circuit, thereby adding additional control over peak inductor current. The soft-start function limits the switch current via the VC pin to maintain a constant voltage ramp rate (dV/dt) at the output capacitor. A capaci- tor (C1 in Figure 2) from the CSS pin to the regulated output voltage determines the output voltage ramp rate. When the current through the CSS capacitor exceeds the CSS threshold (ICSS), the voltage ramp of the output capacitor is limited by reducing the VC pin voltage.The CSS threshold is proportional to the FB voltage (see Typical Performance Characteristics) and is defeated for FB voltages greater than 0.9V (typical). The output dV/dt can be approxi- mated by: dV dt I C CSS SS = but actual values will vary due to start-up load conditions, compensation values and output capacitor selection. APPLICATIO S I FOR ATIO |
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