LTM4601AV datasheet(10/28 Pages) LINER

10 / 28 page

LTM4601A/LTM4601A-1

4601afb

The typical LTM4601A application circuit is shown in

Figure 18. External component selection is primarily

determined by the maximum load current and output

voltage. Refer to Table 2 for speciﬁc external capacitor

requirements for a particular application.

VIN to VOUT Step-Down Ratios

There are restrictions in the maximum VIN and VOUT step

down ratio that can be achieved for a given input voltage.

These constraints are shown in the Typical Performance

Characteristics curves labeled “VIN to VOUT Step-Down

Ratio”. Note that additional thermal derating may apply. See

the Thermal Considerations and Output Current Derating

section of this data sheet.

Output Voltage Programming and Margining

The PWM controller has an internal 0.6V reference voltage.

As shown in the Block Diagram, a 1M and a 60.4k 0.5%

internal feedback resistor connects VOUT and VFB pins

together. The VOUT_LCL pin is connected between the 1M

and the 60.4k resistor. The 1M resistor is used to protect

against an output overvoltage condition if the VOUT_LCL

pin is not connected to the output, or if the remote sense

ampliﬁer output is not connected to VOUT_LCL. The output

voltage will default to 0.6V. Adding a resistor RSET from the

VFB pin to SGND pin programs the output voltage:

VOUT = 0.6V

60.4k

SET

RSET

Table 1. RSET Standard 1% Resistor Values vs VOUT

RSET

Ω)

Open

60.4

40.2

30.1

25.5

19.1

13.3

8.25

VOUT

(V)

0.6

1.2

1.5

1.8

2.5

3.3

The MPGM pin programs a current that when multiplied

by an internal 10k resistor sets up the 0.6V reference ±

offset for margining. A 1.18V reference divided by the

RPGM resistor on the MPGM pin programs the current.

Calculate VOUT(MARGIN):

VOUT(MARGIN) =

%VOUT

100

•VOUT

where %VOUTisthepercentageofVOUTyouwanttomargin,

and VOUT(MARGIN) is the margin quantity in volts:

RPGM =

VOUT

0.6V

•

1.18V

VOUT(MARGIN)

•10k

where RPGM is the resistor value to place on the MPGM

pin to ground.

The output margining will be ± margining of the value.

This is controlled by the MARG0 and MARG1 pins. See

the truth table below:

MARG1

MARG0

MODE

LOW

NO MARGIN

LOW

HIGH

MARGIN UP

HIGH

LOW

MARGIN DOWN

HIGH

NO MARGIN

Input Capacitors

LTM4601A module should be connected to a low AC

impedance DC source. Input capacitors are required to

be placed adjacent to the module. In Figure 18, the 10μF

ceramic input capacitors are selected for their ability to

handle the large RMS current into the converter. An input

bulk capacitor of 100μF is optional. This 100μF capacitor is

only needed if the input source impedance is compromised

by long inductive leads or traces.

APPLICATIONS INFORMATION

LTM4601AV Datasheet(PDF) 10 Page - Linear Technology

LTM4601AV Datasheet(HTML) 10 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

Datasheet Download

Link URL