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LTC2484

2484fa

Conversion Clock

A major advantage the delta-sigma converter offers over

conventional type converters is an on-chip digital filter

(commonly implemented as a SINC or Comb filter). For high

resolution, low frequency applications, this filter is typically

designed to reject line frequencies of 50Hz or 60Hz plus their

harmonics. The filter rejection performance is directly

related to the accuracy of the converter system clock.

The LTC2484 incorporates a highly accurate on-chip

oscillator. This eliminates the need for external frequency

setting components such as crystals or oscillators.

Frequency Rejection Selection (FO)

The LTC2484 internal oscillator provides better than 110dB

normal mode rejection at the line frequency and all its

harmonics (up to the 255th) for 50Hz

±2% or 60Hz ±2%,

or better than 87dB normal mode rejection from 48Hz to

62.4Hz. The rejection mode is selected by writing to the

on-chip configuration register and the default mode at

POR is simultaneous 50Hz/60Hz rejection.

When a fundamental rejection frequency different from

50Hz or 60Hz is required or when the converter must be

synchronized with an outside source, the LTC2484 can

operate with an external conversion clock. The converter

automatically detects the presence of an external clock

signal at the FO pin and turns off the internal oscillator. The

frequency fEOSC of the external signal must be at least

10kHz to be detected. The external clock signal duty cycle

is not significant as long as the minimum and maximum

specifications for the high and low periods tHEO and tLEO

are observed.

Whenever an external clock is not present at the FO pin, the

converter automatically activates its internal oscillator and

enters the Internal Conversion Clock mode. The LTC2484

operation will not be disturbed if the change of conversion

clock source occurs during the sleep state or during the

data output state while the converter uses an external

serial clock. If the change occurs during the conversion

state, the result of the conversion in progress may be

outside specifications but the following conversions will

not be affected. If the change occurs during the data output

state and the converter is in the Internal SCK mode, the

serial clock duty cycle may be affected but the serial data

stream will remain valid.

Table 4 summarizes the duration of each state and the

achievable output data rate as a function of FO.

APPLICATIO S I FOR ATIO

Figure 3. LTC2484 Normal Mode Rejection When Using

an External Oscillator

DIFFERENTIAL INPUT SIGNAL FREQUENCY

DEVIATION FROM NOTCH FREQUENCY fEOSC/5120(%)

–12

–8

–4

048

2484 F03

–80

–85

–90

–95

–100

–105

–110

–115

–120

–125

–130

–135

–140

While operating with an external conversion clock of a

frequency fEOSC, the LTC2484 provides better than 110dB

normal mode rejection in a frequency range of fEOSC/5120

±4% and its harmonics. The normal mode rejection as a

function of the input frequency deviation from fEOSC/5120

is shown in Figure 3.

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